The present disclosure relates to a bus system and specifically relates to a bridge circuit through which the bus system and connection apparatuses are connected to each other.
In a bus system, plural connection apparatuses are connected to a bus (referred to as “an interconnect” as well), and data transfer is carried out among the plural connection apparatuses. A connection apparatus which plays a leading role in the data transfer is called a master, and a connection apparatus which is passively operated is called a slave. A processor, for example, is supposed as the connection apparatus becoming the master. A memory, for example, is supposed as the connection apparatus becoming the slave.
In such a bus system, of a series of operations (transaction) for the data transfer, a request for the data transfer, and the actual data transfer are controlled independently of each other (split transaction), thereby making it possible to enhance a transfer efficiency. On the other hand, in the case where the split transaction is permitted, when a certain master or slave is hanged up due to some sort of failure, the hang-up of the entire system is reached in some cases. For example, it is supposed that in the interconnect through which masters M0 and M1, and slaves S0 and S1 are connected to each other, the slave S0 is hanged up while the master M1 accesses both of the slaves S0 and S1. When there is an order regulation in which data from the slave S0 is returned back to the master M0 earlier than data from the slave S1, it may be impossible to complete the transfer as well between the master M0 and the slave S1. At this time, since it may be impossible to complete the transfer in the slave S1 itself, when the master M1 accesses the slave S1, it may be impossible to complete this access as well. As a result, the slave S0 is hanged up, which results in that other masters M0 and M1, and slave S1 are all hanged up.
In this regard, in a system in which the split transaction is not permitted, if either the master or the slave causing the hang-up is electrically disconnected from the interconnect when only one access is simultaneously carried out, a system operation can be continued. For example, a bus system is proposed in which a bus disconnection signal is outputted to a gate, thereby electrically disconnecting a bus master. This system, for example, is disclosed in Japanese Patent Laid-Open No. 2002-269033 (refer to FIG. 1).